fx2spi.h¶
The fx2spi.h
header contains templated SPI bitbang routines for the Cypress FX2 series implemented in assembly. This header is the complete implementation of the SPI interface and does not have a corresponding library.
Reference¶
Defines
-
DEFINE_SPI_WR_FN(name, sck, si)¶
This macro defines a function
void name(const __xdata uint8_t *data, uint16_t len)
that implements an optimized (76 clock cycles per iteration; ~5 MHz at 48 MHz CLKOUT) SPI Mode 3 write routine. Thesck
andsi
parameters may point to any pins, and are defined in the formatPxn
.For example, invoking the macro as
DEFINE_SPI_WR_FN(flash_write, PA1, PB6)
defines a routinevoid flash_write()
that assumes an SPI device’s SCK pin is connected to A1 and MOSI pin is connected to B6.
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DEFINE_SPI_RD_FN(name, sck, so)¶
This macro defines a function
void name(__xdata uint8_t *data, uint16_t len)
that implements an optimized (76 clock cycles per iteration; ~5 MHz at 48 MHz CLKOUT) SPI Mode 3 read routine. Thesck
andso
parameters may point to any pins, and are defined in the format_Pxn
(note the underscore).For example, invoking the macro as
DEFINE_SPI_RD_FN(flash_read, PA1, PB5)
defines a routinevoid flash_read()
that assumes an SPI device’s SCK pin is connected to A1 and MISO pin is connected to B5.