fx2regs.h¶

The fx2regs.h header contains register definitions for the Cypress FX2 series.

Renamed registers¶

All definitions are (semi-)automatically generated from the datasheet information, and names match the datasheet, except where that would result in a conflict.

The following definitions are changed:

in the TMOD register, bits corresponding to the TIMER0 and TIMER1 peripherals are suffixed with _0 and _1,

in the PORTECFG register, bit INT6 is renamed to INT6,

in the EPnGPIFPFSTOP registers, bit FIFOnFLAG is renamed to FIFOFLAG,

in the GPIFTRIG and GPIFIDLECS registers, bit GPIFDONE is renamed to GPIFIDLE.

The following definitions are absent:

all EPn and PKTSn bit definitions.

All bit definitions that are a part of a two’s-complement number (e.g. An and Dn address and data bits) are also absent.

Reference¶

Bits from register DPS

_SEL¶: Bit 0.

Bits from register PCON

_IDLE¶: Bit 0.

_SMOD0¶: Bit 7.

Bits from register TCON

_IT0¶: Bit 0.

_IE0¶: Bit 1.

_IT1¶: Bit 2.

_IE1¶: Bit 3.

_TR0¶: Bit 4.

_TF0¶: Bit 5.

_TR1¶: Bit 6.

_TF1¶: Bit 7.

Bits from register TMOD

_M0_0¶: Bit 0.

_M1_0¶: Bit 1.

_CT_0¶: Bit 2.

_GATE_0¶: Bit 3.

_M0_1¶: Bit 4.

_M1_1¶: Bit 5.

_CT_1¶: Bit 6.

_GATE_1¶: Bit 7.

Bits from register CKCON

_MD0¶: Bit 0.

_MD1¶: Bit 1.

_MD2¶: Bit 2.

_T0M¶: Bit 3.

_T1M¶: Bit 4.

_T2M¶: Bit 5.

Bits from register EXIF

_USBINT¶: Bit 4.

_I2CINT¶: Bit 5.

_IE4¶: Bit 6.

_IE5¶: Bit 7.

Bits from register SCON0

_RI_0¶: Bit 0.

_TI_0¶: Bit 1.

_RB8_0¶: Bit 2.

_TB8_0¶: Bit 3.

_REN_0¶: Bit 4.

_SM2_0¶: Bit 5.

_SM1_0¶: Bit 6.

_SM0_0¶: Bit 7.

Bits from register IE

_EX0¶: Bit 0.

_ET0¶: Bit 1.

_EX1¶: Bit 2.

_ET1¶: Bit 3.

_ES0¶: Bit 4.

_ET2¶: Bit 5.

_ES1¶: Bit 6.

_EA¶: Bit 7.

Bits from register EP2468STAT

_EP2E¶: Bit 0.

_EP2F¶: Bit 1.

_EP4E¶: Bit 2.

_EP4F¶: Bit 3.

_EP6E¶: Bit 4.

_EP6F¶: Bit 5.

_EP8E¶: Bit 6.

_EP8F¶: Bit 7.

Bits from register EP24FIFOFLGS

_EP2FF¶: Bit 0.

_EP2EF¶: Bit 1.

_EP2PF¶: Bit 2.

_EP4FF¶: Bit 4.

_EP4EF¶: Bit 5.

_EP4PF¶: Bit 6.

Bits from register EP68FIFOFLGS

_EP6FF¶: Bit 0.

_EP6EF¶: Bit 1.

_EP6PF¶: Bit 2.

_EP8FF¶: Bit 4.

_EP8EF¶: Bit 5.

_EP8PF¶: Bit 6.

Bits from register AUTOPTRSETUP

_APTREN¶: Bit 0.

_APTR1INC¶: Bit 1.

_APTR2INC¶: Bit 2.

Bits from register IP

_PX0¶: Bit 0.

_PT0¶: Bit 1.

_PX1¶: Bit 2.

_PT1¶: Bit 3.

_PS0¶: Bit 4.

_PT2¶: Bit 5.

_PS1¶: Bit 6.

Bits from register EP01STAT

_EP1OUTBSY¶: Bit 1.

_EP1INBSY¶: Bit 2.

Bits from register GPIFTRIG

_RW¶: Bit 2.

Bits from registers GPIFIDLECS, GPIFTRIG

_GPIFIDLE¶: Bit 7.

Bits from register SCON1

_RI_1¶: Bit 0.

_TI_1¶: Bit 1.

_RB8_1¶: Bit 2.

_TB8_1¶: Bit 3.

_REN_1¶: Bit 4.

_SM2_1¶: Bit 5.

_SM1_1¶: Bit 6.

_SM0_1¶: Bit 7.

Bits from register T2CON

_CPRL2¶: Bit 0.

_CT2¶: Bit 1.

_TR2¶: Bit 2.

_EXEN2¶: Bit 3.

_TCLK¶: Bit 4.

_RCLK¶: Bit 5.

_EXF2¶: Bit 6.

_TF2¶: Bit 7.

Bits from register PSW

_P¶: Bit 0.

_F1¶: Bit 1.

_OV¶: Bit 2.

_RS0¶: Bit 3.

_RS1¶: Bit 4.

_F0¶: Bit 5.

_AC¶: Bit 6.

_CY¶: Bit 7.

Bits from register EICON

_INT6¶: Bit 4.

_RESI¶: Bit 5.

_ERESI¶: Bit 6.

Bits from register EIE

_EUSB¶: Bit 0.

_EI2C¶: Bit 1.

_EX4¶: Bit 2.

_EX5¶: Bit 3.

_EX6¶: Bit 4.

Bits from register EIP

_PUSB¶: Bit 1.

_PI2C¶: Bit 2.

_PX4¶: Bit 3.

_PX5¶: Bit 4.

_PX6¶: Bit 5.

Bits from register GPCR2

_FULL_SPEED_ONLY¶: Bit 4.

Bits from register CPUCS

_8051RES¶: Bit 0.

_CLKOE¶: Bit 1.

_CLKINV¶: Bit 2.

_CLKSPD0¶: Bit 3.

_CLKSPD1¶: Bit 4.

_PORTCSTB¶: Bit 5.

Bits from register IFCONFIG

_IFCFG0¶: Bit 0.

_IFCFG1¶: Bit 1.

_GSTATE¶: Bit 2.

_ASYNC¶: Bit 3.

_IFCLKPOL¶: Bit 4.

_IFCLKOE¶: Bit 5.

_3048MHZ¶: Bit 6.

_IFCLKSRC¶: Bit 7.

Bits from register PINFLAGSAB

_FLAGA0¶: Bit 0.

_FLAGA1¶: Bit 1.

_FLAGA2¶: Bit 2.

_FLAGA3¶: Bit 3.

_FLAGB0¶: Bit 4.

_FLAGB1¶: Bit 5.

_FLAGB2¶: Bit 6.

_FLAGB3¶: Bit 7.

Bits from register PINFLAGSCD

_FLAGC0¶: Bit 0.

_FLAGC1¶: Bit 1.

_FLAGC2¶: Bit 2.

_FLAGC3¶: Bit 3.

_FLAGD0¶: Bit 4.

_FLAGD1¶: Bit 5.

_FLAGD2¶: Bit 6.

_FLAGD3¶: Bit 7.

Bits from register FIFORESET

_NAKALL¶: Bit 7.

Bits from register BREAKPT

_BPEN¶: Bit 1.

_BPPULSE¶: Bit 2.

_BREAK¶: Bit 3.

Bits from register UART230

_230UART0¶: Bit 0.

_230UART1¶: Bit 1.

Bits from register FIFOPINPOLAR

_SLWR¶: Bit 2.

_SLRD¶: Bit 3.

_SLOE¶: Bit 4.

_PKTEND¶: Bit 5.

Bits from registers EP2FIFOFLGS, EP2FIFOIE, EP2FIFOIRQ, EP4FIFOFLGS, EP4FIFOIE, EP4FIFOIRQ, EP6FIFOFLGS, EP6FIFOIE, EP6FIFOIRQ, EP8FIFOFLGS, EP8FIFOIE, EP8FIFOIRQ, FIFOPINPOLAR

_FF¶: Bit 0.

_EF¶: Bit 1.

Bits from register REVCTL

_ENH_PKT¶: Bit 0.

_DYN_OUT¶: Bit 1.

Bits from register GPIFHOLDAMOUNT

_HOLDTIME0¶: Bit 0.

_HOLDTIME1¶: Bit 1.

Bits from registers EP2CFG, EP6CFG

_BUF0¶: Bit 0.

_BUF1¶: Bit 1.

_SIZE¶: Bit 3.

Bits from registers EP2CFG, EP4CFG, EP6CFG, EP8CFG

_DIR¶: Bit 6.

Bits from registers EP1INCFG, EP1OUTCFG, EP2CFG, EP4CFG, EP6CFG, EP8CFG

_TYPE0¶: Bit 4.

_TYPE1¶: Bit 5.

_VALID¶: Bit 7.

Bits from registers EP2FIFOCFG, EP4FIFOCFG, EP6FIFOCFG, EP8FIFOCFG

_WORDWIDE¶: Bit 0.

_ZEROLENIN¶: Bit 2.

_AUTOIN¶: Bit 3.

_AUTOOUT¶: Bit 4.

_OEP1¶: Bit 5.

_INFM1¶: Bit 6.

Bits from register ECCCFG

_ECCM¶: Bit 0.

Bits from registers EP2FIFOPFH, EP4FIFOPFH, EP6FIFOPFH, EP8FIFOPFH

_PKTSTAT¶: Bit 6.

_DECIS¶: Bit 7.

Bits from registers EP2ISOINPKTS, EP4ISOINPKTS, EP6ISOINPKTS, EP8ISOINPKTS

_AADJ¶: Bit 7.

Bits from registers EP2BCL, EP4BCL, EP6BCL, EP8BCL, INPKTEND, OUTPKTEND

_SKIP¶: Bit 7.

Bits from registers EP2FIFOIE, EP4FIFOIE, EP6FIFOIE, EP8FIFOIE

_EDGEPF¶: Bit 3.

Bits from registers EP2FIFOFLGS, EP2FIFOIE, EP2FIFOIRQ, EP4FIFOFLGS, EP4FIFOIE, EP4FIFOIRQ, EP6FIFOFLGS, EP6FIFOIE, EP6FIFOIRQ, EP8FIFOFLGS, EP8FIFOIE, EP8FIFOIRQ

_PF¶: Bit 2.

Bits from registers IBNIE, IBNIRQ

_IBNI_EP0¶: Bit 0.

_IBNI_EP1¶: Bit 1.

_IBNI_EP2¶: Bit 2.

_IBNI_EP4¶: Bit 3.

_IBNI_EP6¶: Bit 4.

_IBNI_EP8¶: Bit 5.

Bits from registers NAKIE, NAKIRQ

_IBN¶: Bit 0.

Bits from registers USBIE, USBIRQ

_SUDAV¶: Bit 0.

_SOF¶: Bit 1.

_SUTOK¶: Bit 2.

_SUSP¶: Bit 3.

_URES¶: Bit 4.

_HSGRANT¶: Bit 5.

_EP0ACK¶: Bit 6.

Bits from registers EPIE, EPIRQ

_EPI_EP0IN¶: Bit 0.

_EPI_EP0OUT¶: Bit 1.

_EPI_EP1IN¶: Bit 2.

_EPI_EP1OUT¶: Bit 3.

_EPI_EP2¶: Bit 4.

_EPI_EP4¶: Bit 5.

_EPI_EP6¶: Bit 6.

_EPI_EP8¶: Bit 7.

Bits from registers GPIFIE, GPIFIRQ

_GPIFDONE¶: Bit 0.

_GPIFWF¶: Bit 1.

Bits from registers USBERRIE, USBERRIRQ

_ERRLIMIT¶: Bit 0.

_ISOEP2¶: Bit 4.

_ISOEP4¶: Bit 5.

_ISOEP6¶: Bit 6.

_ISOEP8¶: Bit 7.

Bits from register INTSETUP

_AV4EN¶: Bit 0.

_INT4SRC¶: Bit 1.

_AV2EN¶: Bit 3.

Bits from register PORTACFG

_INT0¶: Bit 0.

_INT1¶: Bit 1.

_SLCS¶: Bit 6.

_FLAGD¶: Bit 7.

Bits from register PORTCCFG

_GPIFA0¶: Bit 0.

_GPIFA1¶: Bit 1.

_GPIFA2¶: Bit 2.

_GPIFA3¶: Bit 3.

_GPIFA4¶: Bit 4.

_GPIFA5¶: Bit 5.

_GPIFA6¶: Bit 6.

_GPIFA7¶: Bit 7.

Bits from register PORTECFG

_T0OUT¶: Bit 0.

_T1OUT¶: Bit 1.

_T2OUT¶: Bit 2.

_RXD0OUT¶: Bit 3.

_RXD1OUT¶: Bit 4.

_INT6EX¶: Bit 5.

_T2EX¶: Bit 6.

_GPIFA8¶: Bit 7.

Bits from register I2CS

_DONE¶: Bit 0.

_ACK¶: Bit 1.

_BERR¶: Bit 2.

_ID0¶: Bit 3.

_ID1¶: Bit 4.

_LASTRD¶: Bit 5.

_STOP¶: Bit 6.

_START¶: Bit 7.

Bits from register I2CTL

_400KHZ¶: Bit 0.

_STOPIE¶: Bit 1.

Bits from register USBCS

_SIGRSUME¶: Bit 0.

_RENUM¶: Bit 1.

_NOSYNSOF¶: Bit 2.

_DISCON¶: Bit 3.

_HSM¶: Bit 7.

Bits from register WAKEUPCS

_WUEN¶: Bit 0.

_WU2EN¶: Bit 1.

_DPEN¶: Bit 2.

_WUPOL¶: Bit 4.

_WU2POL¶: Bit 5.

_WU¶: Bit 6.

_WU2¶: Bit 7.

Bits from register TOGCTL

_IO¶: Bit 4.

_R¶: Bit 5.

_S¶: Bit 6.

_Q¶: Bit 7.

Bits from register EP0CS

_HSNAK¶: Bit 7.

Bits from registers EP0CS, EP1INCS, EP1OUTCS

_BUSY¶: Bit 1.

Bits from registers EP2CS, EP6CS

_NPAK2¶: Bit 6.

Bits from registers EP2CS, EP4CS, EP6CS, EP8CS

_EMPTY¶: Bit 2.

_FULL¶: Bit 3.

_NPAK0¶: Bit 4.

_NPAK1¶: Bit 5.

Bits from registers EP0CS, EP1INCS, EP1OUTCS, EP2CS, EP4CS, EP6CS, EP8CS

_STALL¶: Bit 0.

Bits from register SUDPTRCTL

_SDPAUTO¶: Bit 0.

Bits from register GPIFWFSELECT

_FIFORD0¶: Bit 0.

_FIFORD1¶: Bit 1.

_FIFOWR0¶: Bit 2.

_FIFOWR1¶: Bit 3.

_SINGLERD0¶: Bit 4.

_SINGLERD1¶: Bit 5.

_SINGLEWR0¶: Bit 6.

_SINGLEWR1¶: Bit 7.

Bits from register GPIFIDLECS

_IDLEDRV¶: Bit 0.

Bits from register GPIFCTLCFG

_TRICTL¶: Bit 7.

Bits from registers FLOWEQ0CTL, FLOWEQ1CTL

_CTL0E0¶: Bit 4.

_CTL0E1¶: Bit 5.

_CTL0E2¶: Bit 6.

_CTL0E3¶: Bit 7.

Bits from registers FLOWEQ0CTL, FLOWEQ1CTL, GPIFCTLCFG, GPIFIDLECTL

_CTL0¶: Bit 0.

_CTL1¶: Bit 1.

_CTL2¶: Bit 2.

_CTL3¶: Bit 3.

_CTL4¶: Bit 4.

_CTL5¶: Bit 5.

Bits from register FLOWSTATE

_FS2¶: Bit 2.

_FSE¶: Bit 7.

Bits from registers EP2GPIFFLGSEL, EP4GPIFFLGSEL, EP6GPIFFLGSEL, EP8GPIFFLGSEL, FLOWSTATE

_FS0¶: Bit 0.

_FS1¶: Bit 1.

Bits from register FLOWLOGIC

_TERMB0¶: Bit 0.

_TERMB1¶: Bit 1.

_TERMB2¶: Bit 2.

_TERMA0¶: Bit 3.

_TERMA1¶: Bit 4.

_TERMA2¶: Bit 5.

_LFUNC0¶: Bit 6.

_LFUNC1¶: Bit 7.

Bits from register FLOWHOLDOFF

_HOCTL0¶: Bit 0.

_HOCTL1¶: Bit 1.

_HOCTL2¶: Bit 2.

_HOSTATE¶: Bit 3.

_HOPERIOD0¶: Bit 4.

_HOPERIOD1¶: Bit 5.

_HOPERIOD2¶: Bit 6.

_HOPERIOD3¶: Bit 7.

Bits from register FLOWSTB

_MSTB0¶: Bit 0.

_MSTB1¶: Bit 1.

_MSTB2¶: Bit 2.

_SUSTAIN¶: Bit 4.

_CTLTOGL¶: Bit 5.

_RDYASYNC¶: Bit 6.

_SLAVE¶: Bit 7.

Bits from register FLOWSTBEDGE

_RISING¶: Bit 0.

_FALLING¶: Bit 1.

Bits from registers EP2GPIFPFSTOP, EP4GPIFPFSTOP, EP6GPIFPFSTOP, EP8GPIFPFSTOP

_FIFOFLAG¶: Bit 0.

Bits from register GPIFREADYCFG

_TCXRDY5¶: Bit 5.

_SAS¶: Bit 6.

_INTRDY¶: Bit 7.

Bits from register GPIFREADYSTAT

_RDY0¶: Bit 0.

_RDY1¶: Bit 1.

_RDY2¶: Bit 2.

_RDY3¶: Bit 3.

_RDY4¶: Bit 4.

_RDY5¶: Bit 5.

Variables

sfr8_t _XPAGE¶: Alias of MPAGE used internally by sdcc.

sfr8_t IOA¶: Register 0x80: Port A.

sbit_t PA0¶: Register 0x80 bit 0: Port A bit PA0.

sbit_t PA1¶: Register 0x80 bit 1: Port A bit PA1.

sbit_t PA2¶: Register 0x80 bit 2: Port A bit PA2.

sbit_t PA3¶: Register 0x80 bit 3: Port A bit PA3.

sbit_t PA4¶: Register 0x80 bit 4: Port A bit PA4.

sbit_t PA5¶: Register 0x80 bit 5: Port A bit PA5.

sbit_t PA6¶: Register 0x80 bit 6: Port A bit PA6.

sbit_t PA7¶: Register 0x80 bit 7: Port A bit PA7.

sfr8_t SP¶: Register 0x81: Stack Pointer.

sfr8_t DPL0¶: Register 0x82: Data Pointer 0 L.

sfr16_t DP0¶: Register 0x82: Data Pointer 0.

sfr8_t DPH0¶: Register 0x83: Data Pointer 0 H.

sfr8_t DPL1¶: Register 0x84: Data Pointer 1 L.

sfr16_t DP1¶: Register 0x84: Data Pointer 1.

sfr8_t DPH1¶: Register 0x85: Data Pointer 1 H.

sfr8_t DPS¶: Register 0x86: Data Pointer 0/1 select.

sfr8_t PCON¶: Register 0x87: Power Control.

sfr8_t TCON¶: Register 0x88: Timer/Counter Control.

sbit_t IT0¶: Register 0x88 bit 0: Timer/Counter Control bit IT0.

sbit_t IE0¶: Register 0x88 bit 1: Timer/Counter Control bit IE0.

sbit_t IT1¶: Register 0x88 bit 2: Timer/Counter Control bit IT1.

sbit_t IE1¶: Register 0x88 bit 3: Timer/Counter Control bit IE1.

sbit_t TR0¶: Register 0x88 bit 4: Timer/Counter Control bit TR0.

sbit_t TF0¶: Register 0x88 bit 5: Timer/Counter Control bit TF0.

sbit_t TR1¶: Register 0x88 bit 6: Timer/Counter Control bit TR1.

sbit_t TF1¶: Register 0x88 bit 7: Timer/Counter Control bit TF1.

sfr8_t TMOD¶: Register 0x89: Timer/Counter Mode Control.

sfr8_t TL0¶: Register 0x8A: Timer 0 reload L.

sfr16_t T0¶: Register 0x8A: Timer 0 reload.

sfr8_t TL1¶: Register 0x8B: Timer 1 reload L.

sfr16_t T1¶: Register 0x8B: Timer 1 reload.

sfr8_t TH0¶: Register 0x8C: Timer 0 reload H.

sfr8_t TH1¶: Register 0x8D: Timer 1 reload H.

sfr8_t CKCON¶: Register 0x8E: Clock Control.

sfr8_t IOB¶: Register 0x90: Port B.

sbit_t PB0¶: Register 0x90 bit 0: Port B bit PB0.

sbit_t PB1¶: Register 0x90 bit 1: Port B bit PB1.

sbit_t PB2¶: Register 0x90 bit 2: Port B bit PB2.

sbit_t PB3¶: Register 0x90 bit 3: Port B bit PB3.

sbit_t PB4¶: Register 0x90 bit 4: Port B bit PB4.

sbit_t PB5¶: Register 0x90 bit 5: Port B bit PB5.

sbit_t PB6¶: Register 0x90 bit 6: Port B bit PB6.

sbit_t PB7¶: Register 0x90 bit 7: Port B bit PB7.

sfr8_t EXIF¶: Register 0x91: External Interrupt Flag(s)

sfr8_t MPAGE¶: Register 0x92: Upper Addr Byte of MOVX using @R0 / @R1.

sfr8_t SCON0¶: Register 0x98: Serial Port 0 Control.

sbit_t RI_0¶: Register 0x98 bit 0: Serial Port 0 Control bit RI_0.

sbit_t TI_0¶: Register 0x98 bit 1: Serial Port 0 Control bit TI_0.

sbit_t RB8_0¶: Register 0x98 bit 2: Serial Port 0 Control bit RB8_0.

sbit_t TB8_0¶: Register 0x98 bit 3: Serial Port 0 Control bit TB8_0.

sbit_t REN_0¶: Register 0x98 bit 4: Serial Port 0 Control bit REN_0.

sbit_t SM2_0¶: Register 0x98 bit 5: Serial Port 0 Control bit SM2_0.

sbit_t SM1_0¶: Register 0x98 bit 6: Serial Port 0 Control bit SM1_0.

sbit_t SM0_0¶: Register 0x98 bit 7: Serial Port 0 Control bit SM0_0.

sfr8_t SBUF0¶: Register 0x99: Serial Port 0 Data Buffer.

sfr8_t AUTOPTRH1¶: Register 0x9A: Autopointer 1 Address H.

sfr8_t AUTOPTRL1¶: Register 0x9B: Autopointer 1 Address L.

sfr16_t AUTOPTR1¶: Register 0x9B: Autopointer 1 Address.

sfr8_t AUTOPTRH2¶: Register 0x9D: Autopointer 2 Address H.

sfr8_t AUTOPTRL2¶: Register 0x9E: Autopointer 2 Address L.

sfr16_t AUTOPTR2¶: Register 0x9E: Autopointer 2 Address.

sfr8_t IOC¶: Register 0xA0: Port C.

sbit_t PC0¶: Register 0xA0 bit 0: Port C bit PC0.

sbit_t PC1¶: Register 0xA0 bit 1: Port C bit PC1.

sbit_t PC2¶: Register 0xA0 bit 2: Port C bit PC2.

sbit_t PC3¶: Register 0xA0 bit 3: Port C bit PC3.

sbit_t PC4¶: Register 0xA0 bit 4: Port C bit PC4.

sbit_t PC5¶: Register 0xA0 bit 5: Port C bit PC5.

sbit_t PC6¶: Register 0xA0 bit 6: Port C bit PC6.

sbit_t PC7¶: Register 0xA0 bit 7: Port C bit PC7.

sfr8_t INT2CLR¶: Register 0xA1: Interrupt 2 clear.

sfr8_t INT4CLR¶: Register 0xA2: Interrupt 4 clear.

sfr8_t IE¶: Register 0xA8: Interrupt Enable.

sbit_t EX0¶: Register 0xA8 bit 0: Interrupt Enable bit EX0.

sbit_t ET0¶: Register 0xA8 bit 1: Interrupt Enable bit ET0.

sbit_t EX1¶: Register 0xA8 bit 2: Interrupt Enable bit EX1.

sbit_t ET1¶: Register 0xA8 bit 3: Interrupt Enable bit ET1.

sbit_t ES0¶: Register 0xA8 bit 4: Interrupt Enable bit ES0.

sbit_t ET2¶: Register 0xA8 bit 5: Interrupt Enable bit ET2.

sbit_t ES1¶: Register 0xA8 bit 6: Interrupt Enable bit ES1.

sbit_t EA¶: Register 0xA8 bit 7: Interrupt Enable bit EA.

sfr8_t EP2468STAT¶: Register 0xAA: Endpoint 2,4,6,8 status flags.

sfr8_t EP24FIFOFLGS¶: Register 0xAB: Endpoint 2,4 slave FIFO status flags.

sfr8_t EP68FIFOFLGS¶: Register 0xAC: Endpoint 6,8 slave FIFO status flags.

sfr8_t AUTOPTRSETUP¶: Register 0xAF: Autopointer 1&2 setup.

sfr8_t IOD¶: Register 0xB0: Port D.

sbit_t PD0¶: Register 0xB0 bit 0: Port D bit PD0.

sbit_t PD1¶: Register 0xB0 bit 1: Port D bit PD1.

sbit_t PD2¶: Register 0xB0 bit 2: Port D bit PD2.

sbit_t PD3¶: Register 0xB0 bit 3: Port D bit PD3.

sbit_t PD4¶: Register 0xB0 bit 4: Port D bit PD4.

sbit_t PD5¶: Register 0xB0 bit 5: Port D bit PD5.

sbit_t PD6¶: Register 0xB0 bit 6: Port D bit PD6.

sbit_t PD7¶: Register 0xB0 bit 7: Port D bit PD7.

sfr8_t IOE¶: Register 0xB1: Port E.

sfr8_t OEA¶: Register 0xB2: Port A Output Enable.

sfr8_t OEB¶: Register 0xB3: Port B Output Enable.

sfr8_t OEC¶: Register 0xB4: Port C Output Enable.

sfr8_t OED¶: Register 0xB5: Port D Output Enable.

sfr8_t OEE¶: Register 0xB6: Port E Output Enable.

sfr8_t IP¶: Register 0xB8: Interrupt Priority.

sbit_t PX0¶: Register 0xB8 bit 0: Interrupt Priority bit PX0.

sbit_t PT0¶: Register 0xB8 bit 1: Interrupt Priority bit PT0.

sbit_t PX1¶: Register 0xB8 bit 2: Interrupt Priority bit PX1.

sbit_t PT1¶: Register 0xB8 bit 3: Interrupt Priority bit PT1.

sbit_t PS0¶: Register 0xB8 bit 4: Interrupt Priority bit PS0.

sbit_t PT2¶: Register 0xB8 bit 5: Interrupt Priority bit PT2.

sbit_t PS1¶: Register 0xB8 bit 6: Interrupt Priority bit PS1.

sfr8_t EP01STAT¶: Register 0xBA: Endpoint 0&1 Status.

sfr8_t GPIFTRIG¶: Register 0xBB: Endpoint 2,4,6,8 GPIF slave FIFO Trigger.

sfr8_t GPIFSGLDATH¶: Register 0xBD: GPIF Data H (16-bit mode only)

sfr8_t GPIFSGLDATLX¶: Register 0xBE: GPIF Data L w/ Trigger.

sfr8_t GPIFSGLDATL¶: Register 0xBF: GPIF Data L w/ No Trigger D7.

sfr16_t GPIFSGLDAT¶: Register 0xBF: GPIF Data L w/ No Trigger D7.

sfr8_t SCON1¶: Register 0xC0: Serial Port 1 Control.

sbit_t RI_1¶: Register 0xC0 bit 0: Serial Port 1 Control bit RI_1.

sbit_t TI_1¶: Register 0xC0 bit 1: Serial Port 1 Control bit TI_1.

sbit_t RB8_1¶: Register 0xC0 bit 2: Serial Port 1 Control bit RB8_1.

sbit_t TB8_1¶: Register 0xC0 bit 3: Serial Port 1 Control bit TB8_1.

sbit_t REN_1¶: Register 0xC0 bit 4: Serial Port 1 Control bit REN_1.

sbit_t SM2_1¶: Register 0xC0 bit 5: Serial Port 1 Control bit SM2_1.

sbit_t SM1_1¶: Register 0xC0 bit 6: Serial Port 1 Control bit SM1_1.

sbit_t SM0_1¶: Register 0xC0 bit 7: Serial Port 1 Control bit SM0_1.

sfr8_t SBUF1¶: Register 0xC1: Serial Port 1 Data Buffer.

sfr8_t T2CON¶: Register 0xC8: Timer/Counter 2 Control.

sbit_t CPRL2¶: Register 0xC8 bit 0: Timer/Counter 2 Control bit CPRL2.

sbit_t CT2¶: Register 0xC8 bit 1: Timer/Counter 2 Control bit CT2.

sbit_t TR2¶: Register 0xC8 bit 2: Timer/Counter 2 Control bit TR2.

sbit_t EXEN2¶: Register 0xC8 bit 3: Timer/Counter 2 Control bit EXEN2.

sbit_t TCLK¶: Register 0xC8 bit 4: Timer/Counter 2 Control bit TCLK.

sbit_t RCLK¶: Register 0xC8 bit 5: Timer/Counter 2 Control bit RCLK.

sbit_t EXF2¶: Register 0xC8 bit 6: Timer/Counter 2 Control bit EXF2.

sbit_t TF2¶: Register 0xC8 bit 7: Timer/Counter 2 Control bit TF2.

sfr8_t RCAP2L¶: Register 0xCA: Capture for Timer 2, auto-reload, up-counter.

sfr16_t RCAP2¶: Register 0xCA: Capture for Timer 2, auto-reload, up-counter.

sfr8_t RCAP2H¶: Register 0xCB: Capture for Timer 2, auto-reload, up-counter.

sfr8_t TL2¶: Register 0xCC: Timer 2 reload L.

sfr16_t T2¶: Register 0xCC: Timer 2 reload.

sfr8_t TH2¶: Register 0xCD: Timer 2 reload H.

sfr8_t PSW¶: Register 0xD0: Program Status Word.

sbit_t P¶: Register 0xD0 bit 0: Program Status Word bit P.

sbit_t F1¶: Register 0xD0 bit 1: Program Status Word bit F1.

sbit_t OV¶: Register 0xD0 bit 2: Program Status Word bit OV.

sbit_t RS0¶: Register 0xD0 bit 3: Program Status Word bit RS0.

sbit_t RS1¶: Register 0xD0 bit 4: Program Status Word bit RS1.

sbit_t F0¶: Register 0xD0 bit 5: Program Status Word bit F0.

sbit_t AC¶: Register 0xD0 bit 6: Program Status Word bit AC.

sbit_t CY¶: Register 0xD0 bit 7: Program Status Word bit CY.

sfr8_t EICON¶: Register 0xD8: External Interrupt Control SMOD1.

sbit_t INT6¶: Register 0xD8 bit 4: External Interrupt Control SMOD1 bit INT6.

sbit_t RESI¶: Register 0xD8 bit 5: External Interrupt Control SMOD1 bit RESI.

sbit_t ERESI¶: Register 0xD8 bit 6: External Interrupt Control SMOD1 bit ERESI.

sfr8_t ACC¶: Register 0xE0: Accumulator.

sbit_t ACC0¶: Register 0xE0 bit 0: Accumulator bit ACC0.

sbit_t ACC1¶: Register 0xE0 bit 1: Accumulator bit ACC1.

sbit_t ACC2¶: Register 0xE0 bit 2: Accumulator bit ACC2.

sbit_t ACC3¶: Register 0xE0 bit 3: Accumulator bit ACC3.

sbit_t ACC4¶: Register 0xE0 bit 4: Accumulator bit ACC4.

sbit_t ACC5¶: Register 0xE0 bit 5: Accumulator bit ACC5.

sbit_t ACC6¶: Register 0xE0 bit 6: Accumulator bit ACC6.

sbit_t ACC7¶: Register 0xE0 bit 7: Accumulator bit ACC7.

sfr8_t EIE¶: Register 0xE8: External Interrupt Enable(s)

sbit_t EUSB¶: Register 0xE8 bit 0: External Interrupt Enable(s) bit EUSB.

sbit_t EI2C¶: Register 0xE8 bit 1: External Interrupt Enable(s) bit EI2C.

sbit_t EX4¶: Register 0xE8 bit 2: External Interrupt Enable(s) bit EX4.

sbit_t EX5¶: Register 0xE8 bit 3: External Interrupt Enable(s) bit EX5.

sbit_t EX6¶: Register 0xE8 bit 4: External Interrupt Enable(s) bit EX6.

sfr8_t B¶: Register 0xF0: B.

sbit_t B0¶: Register 0xF0 bit 0: B bit B0.

sbit_t B1¶: Register 0xF0 bit 1: B bit B1.

sbit_t B2¶: Register 0xF0 bit 2: B bit B2.

sbit_t B3¶: Register 0xF0 bit 3: B bit B3.

sbit_t B4¶: Register 0xF0 bit 4: B bit B4.

sbit_t B5¶: Register 0xF0 bit 5: B bit B5.

sbit_t B6¶: Register 0xF0 bit 6: B bit B6.

sbit_t B7¶: Register 0xF0 bit 7: B bit B7.

sfr8_t EIP¶: Register 0xF8: External Interrupt Priority 1 Control.

sbit_t PUSB¶: Register 0xF8 bit 1: External Interrupt Priority 1 Control bit PUSB.

sbit_t PI2C¶: Register 0xF8 bit 2: External Interrupt Priority 1 Control bit PI2C.

sbit_t PX4¶: Register 0xF8 bit 3: External Interrupt Priority 1 Control bit PX4.

sbit_t PX5¶: Register 0xF8 bit 4: External Interrupt Priority 1 Control bit PX5.

sbit_t PX6¶: Register 0xF8 bit 5: External Interrupt Priority 1 Control bit PX6.

ior8_t WAVEDATA[128]¶: Register 0xE400: GPIF Waveform Descriptor 0, 1, 2, 3 data.

ior8_t GPCR2¶: Register 0xE50D: General Purpose Configuration Register 2.

ior8_t CPUCS¶: Register 0xE600: CPU Control & Status.

ior8_t IFCONFIG¶: Register 0xE601: Interface Configuration (Ports, GPIF, slave FIFOs)

ior8_t PINFLAGSAB¶: Register 0xE602: Slave FIFO FLAGA and FLAGB Pin Configuration.

ior8_t PINFLAGSCD¶: Register 0xE603: Slave FIFO FLAGC and FLAGD Pin Configuration.

ior8_t FIFORESET¶: Register 0xE604: Restore FIFOS to default state.

ior8_t BREAKPT¶: Register 0xE605: Breakpoint Control.

ior8_t BPADDRH¶: Register 0xE606: Breakpoint Address H.

ior8_t BPADDRL¶: Register 0xE607: Breakpoint Address L.

ior8_t UART230¶: Register 0xE608: 230 Kbaud internally generated ref. clock.

ior8_t FIFOPINPOLAR¶: Register 0xE609: Slave FIFO Interface pins polarity.

ior8_t REVID¶: Register 0xE60A: Chip Revision.

ior8_t REVCTL¶: Register 0xE60B: Chip Revision Control.

ior8_t GPIFHOLDAMOUNT¶: Register 0xE60C: MSTB Hold Time (for UDMA)

ior8_t EP1OUTCFG¶: Register 0xE610: Endpoint 1-OUT Configuration.

ior8_t EP1INCFG¶: Register 0xE611: Endpoint 1-IN Configuration.

ior8_t EP2CFG¶: Register 0xE612: Endpoint 2 Configuration.

ior8_t EP4CFG¶: Register 0xE613: Endpoint 4 Configuration.

ior8_t EP6CFG¶: Register 0xE614: Endpoint 6 Configuration.

ior8_t EP8CFG¶: Register 0xE615: Endpoint 8 Configuration.

ior8_t EP2FIFOCFG¶: Register 0xE618: Endpoint 2 / slave FIFO configuration.

ior8_t EP4FIFOCFG¶: Register 0xE619: Endpoint 4 / slave FIFO configuration.

ior8_t EP6FIFOCFG¶: Register 0xE61A: Endpoint 6 / slave FIFO configuration.

ior8_t EP8FIFOCFG¶: Register 0xE61B: Endpoint 8 / slave FIFO configuration.

ior8_t EP2AUTOINLENH¶: Register 0xE620: Endpoint 2 AUTOIN Packet Length H.

ior8_t EP2AUTOINLENL¶: Register 0xE621: Endpoint 2 AUTOIN Packet Length L.

ior8_t EP4AUTOINLENH¶: Register 0xE622: Endpoint 4 AUTOIN Packet Length H.

ior8_t EP4AUTOINLENL¶: Register 0xE623: Endpoint 4 AUTOIN Packet Length L.

ior8_t EP6AUTOINLENH¶: Register 0xE624: Endpoint 6 AUTOIN Packet Length H.

ior8_t EP6AUTOINLENL¶: Register 0xE625: Endpoint 6 AUTOIN Packet Length L.

ior8_t EP8AUTOINLENH¶: Register 0xE626: Endpoint 8 AUTOIN Packet Length H.

ior8_t EP8AUTOINLENL¶: Register 0xE627: Endpoint 8 AUTOIN Packet Length L.

ior8_t ECCCFG¶: Register 0xE628: ECC Configuration.

ior8_t ECCRESET¶: Register 0xE629: ECC Reset.

ior8_t ECC1B0¶: Register 0xE62A: ECC1 Byte 0 Address.

ior8_t ECC1B1¶: Register 0xE62B: ECC1 Byte 1 Address.

ior8_t ECC1B2¶: Register 0xE62C: ECC1 Byte 2 Address.

ior8_t ECC2B0¶: Register 0xE62D: ECC2 Byte 0 Address.

ior8_t ECC2B1¶: Register 0xE62E: ECC2 Byte 1 Address.

ior8_t ECC2B2¶: Register 0xE62F: ECC2 Byte 2 Address.

ior8_t EP2FIFOPFH¶: Register 0xE630: Endpoint 2 / slave FIFO Programmable Flag H.

ior8_t EP2FIFOPFL¶: Register 0xE631: Endpoint 2 / slave FIFO Programmable Flag L.

ior8_t EP4FIFOPFH¶: Register 0xE632: Endpoint 4 / slave FIFO Programmable Flag H.

ior8_t EP4FIFOPFL¶: Register 0xE633: Endpoint 4 / slave FIFO Programmable Flag L.

ior8_t EP6FIFOPFH¶: Register 0xE634: Endpoint 6 / slave FIFO Programmable Flag H.

ior8_t EP6FIFOPFL¶: Register 0xE635: Endpoint 6 / slave FIFO Programmable Flag L.

ior8_t EP8FIFOPFH¶: Register 0xE636: Endpoint 8 / slave FIFO Programmable Flag H.

ior8_t EP8FIFOPFL¶: Register 0xE637: Endpoint 8 / slave FIFO Programmable Flag L.

ior8_t EP2ISOINPKTS¶: Register 0xE640: EP2 (if ISO) IN Packets per frame (1-3)

ior8_t EP4ISOINPKTS¶: Register 0xE641: EP4 (if ISO) IN Packets per frame (1-3)

ior8_t EP6ISOINPKTS¶: Register 0xE642: EP6 (if ISO) IN Packets per frame (1-3)

ior8_t EP8ISOINPKTS¶: Register 0xE643: EP8 (if ISO) IN Packets per frame (1-3)

ior8_t INPKTEND¶: Register 0xE648: Force IN Packet End.

ior8_t OUTPKTEND¶: Register 0xE649: Force OUT Packet End.

ior8_t EP2FIFOIE¶: Register 0xE650: Endpoint 2 slave FIFO Flag Interrupt Enable.

ior8_t EP2FIFOIRQ¶: Register 0xE651: Endpoint 2 slave FIFO Flag Interrupt Request.

ior8_t EP4FIFOIE¶: Register 0xE652: Endpoint 4 slave FIFO Flag Interrupt Enable.

ior8_t EP4FIFOIRQ¶: Register 0xE653: Endpoint 4 slave FIFO Flag Interrupt Request.

ior8_t EP6FIFOIE¶: Register 0xE654: Endpoint 6 slave FIFO Flag Interrupt Enable.

ior8_t EP6FIFOIRQ¶: Register 0xE655: Endpoint 6 slave FIFO Flag Interrupt Request.

ior8_t EP8FIFOIE¶: Register 0xE656: Endpoint 8 slave FIFO Flag Interrupt Enable.

ior8_t EP8FIFOIRQ¶: Register 0xE657: Endpoint 8 slave FIFO Flag Interrupt Request.

ior8_t IBNIE¶: Register 0xE658: IN-BULK-NAK Interrupt Enable.

ior8_t IBNIRQ¶: Register 0xE659: IN-BULK-NAK Interrupt Request.

ior8_t NAKIE¶: Register 0xE65A: Endpoint Ping-NAK / IBN Interrupt Enable.

ior8_t NAKIRQ¶: Register 0xE65B: Endpoint Ping-NAK / IBN Interrupt Request.

ior8_t USBIE¶: Register 0xE65C: USB Interrupt Enables.

ior8_t USBIRQ¶: Register 0xE65D: USB Interrupt Requests.

ior8_t EPIE¶: Register 0xE65E: Endpoint Interrupt Enables.

ior8_t EPIRQ¶: Register 0xE65F: Endpoint Interrupt Requests.

ior8_t GPIFIE¶: Register 0xE660: GPIF Interrupt Enable.

ior8_t GPIFIRQ¶: Register 0xE661: GPIF Interrupt Request.

ior8_t USBERRIE¶: Register 0xE662: USB Error Interrupt Enables.

ior8_t USBERRIRQ¶: Register 0xE663: USB Error Interrupt Requests.

ior8_t ERRCNTLIM¶: Register 0xE664: USB Error counter and limit.

ior8_t CLRERRCNT¶: Register 0xE665: Clear Error Counter EC3:0.

ior8_t INT2IVEC¶: Register 0xE666: Interrupt 2 (USB) Autovector.

ior8_t INT4IVEC¶: Register 0xE667: Interrupt 4 (slave FIFO & 1 GPIF) Autovector.

ior8_t INTSETUP¶: Register 0xE668: Interrupt 2&4 setup.

ior8_t PORTACFG¶: Register 0xE670: I/O PORTA Alternate Configuration.

ior8_t PORTCCFG¶: Register 0xE671: I/O PORTC Alternate Configuration.

ior8_t PORTECFG¶: Register 0xE672: I/O PORTE Alternate Configuration.

ior8_t I2CS¶: Register 0xE678: I2C Bus Control & Status.

ior8_t I2DAT¶: Register 0xE679: I2C Bus Data.

ior8_t I2CTL¶: Register 0xE67A: I2C Bus Control.

ior8_t XAUTODAT1¶: Register 0xE67B: Autoptr1 MOVX access, when APTREN=1.

ior8_t XAUTODAT2¶: Register 0xE67C: Autoptr2 MOVX access, when APTREN=1.

ior8_t UDMACRCH¶: Register 0xE67D: UDMA CRC MSB.

ior8_t UDMACRCL¶: Register 0xE67E: UDMA CRC LSB.

ior8_t UDMACRCQUALIFIER¶: Register 0xE67F: UDMA CRC Qualifier.

ior8_t USBCS¶: Register 0xE680: USB Control & Status.

ior8_t SUSPEND¶: Register 0xE681: Put chip into suspend.

ior8_t WAKEUPCS¶: Register 0xE682: Wakeup Control & Status.

ior8_t TOGCTL¶: Register 0xE683: Toggle Control.

ior8_t USBFRAMEH¶: Register 0xE684: USB Frame count H.

ior8_t USBFRAMEL¶: Register 0xE685: USB Frame count L.

ior8_t MICROFRAME¶: Register 0xE686: Microframe count, 0-7.

ior8_t FNADDR¶: Register 0xE687: USB Function address.

ior8_t EP0BCH¶: Register 0xE68A: Endpoint 0 Byte Count H.

ior8_t EP0BCL¶: Register 0xE68B: Endpoint 0 Byte Count L.

ior8_t EP1OUTBC¶: Register 0xE68D: Endpoint 1 OUT Byte Count.

ior8_t EP1INBC¶: Register 0xE68F: Endpoint 1 IN Byte Count.

ior8_t EP2BCH¶: Register 0xE690: Endpoint 2 Byte Count H.

ior8_t EP2BCL¶: Register 0xE691: Endpoint 2 Byte Count L.

ior8_t EP4BCH¶: Register 0xE694: Endpoint 4 Byte Count H.

ior8_t EP4BCL¶: Register 0xE695: Endpoint 4 Byte Count L.

ior8_t EP6BCH¶: Register 0xE698: Endpoint 6 Byte Count H.

ior8_t EP6BCL¶: Register 0xE699: Endpoint 6 Byte Count L.

ior8_t EP8BCH¶: Register 0xE69C: Endpoint 8 Byte Count H.

ior8_t EP8BCL¶: Register 0xE69D: Endpoint 8 Byte Count L.

ior8_t EP0CS¶: Register 0xE6A0: Endpoint 0 Control and Status.

ior8_t EP1OUTCS¶: Register 0xE6A1: Endpoint 1 OUT Control and Status.

ior8_t EP1INCS¶: Register 0xE6A2: Endpoint 1 IN Control and Status.

ior8_t EP2CS¶: Register 0xE6A3: Endpoint 2 Control and Status.

ior8_t EP4CS¶: Register 0xE6A4: Endpoint 4 Control and Status.

ior8_t EP6CS¶: Register 0xE6A5: Endpoint 6 Control and Status.

ior8_t EP8CS¶: Register 0xE6A6: Endpoint 8 Control and Status.

ior8_t EP2FIFOFLGS¶: Register 0xE6A7: Endpoint 2 slave FIFO Flags.

ior8_t EP4FIFOFLGS¶: Register 0xE6A8: Endpoint 4 slave FIFO Flags.

ior8_t EP6FIFOFLGS¶: Register 0xE6A9: Endpoint 6 slave FIFO Flags.

ior8_t EP8FIFOFLGS¶: Register 0xE6AA: Endpoint 8 slave FIFO Flags.

ior8_t EP2FIFOBCH¶: Register 0xE6AB: Endpoint 2 slave FIFO total byte count H.

ior8_t EP2FIFOBCL¶: Register 0xE6AC: Endpoint 2 slave FIFO total byte count L.

ior8_t EP4FIFOBCH¶: Register 0xE6AD: Endpoint 4 slave FIFO total byte count H.

ior8_t EP4FIFOBCL¶: Register 0xE6AE: Endpoint 4 slave FIFO total byte count L.

ior8_t EP6FIFOBCH¶: Register 0xE6AF: Endpoint 6 slave FIFO total byte count H.

ior8_t EP6FIFOBCL¶: Register 0xE6B0: Endpoint 6 slave FIFO total byte count L.

ior8_t EP8FIFOBCH¶: Register 0xE6B1: Endpoint 8 slave FIFO total byte count H.

ior8_t EP8FIFOBCL¶: Register 0xE6B2: Endpoint 8 slave FIFO total byte count L.

ior8_t SUDPTRH¶: Register 0xE6B3: Setup Data Pointer high address byte.

ior8_t SUDPTRL¶: Register 0xE6B4: Setup Data Pointer low address byte.

ior8_t SUDPTRCTL¶: Register 0xE6B5: Setup Data Pointer Auto Mode.

ior8_t SETUPDAT[8]¶: Register 0xE6B8: 8 bytes of setup data.

ior8_t GPIFWFSELECT¶: Register 0xE6C0: Waveform Selector.

ior8_t GPIFIDLECS¶: Register 0xE6C1: GPIF Done, GPIF IDLE drive mode.

ior8_t GPIFIDLECTL¶: Register 0xE6C2: Inactive Bus, CTL states.

ior8_t GPIFCTLCFG¶: Register 0xE6C3: CTL Drive Type.

ior8_t GPIFADRH¶: Register 0xE6C4: GPIF Address H.

ior8_t GPIFADRL¶: Register 0xE6C5: GPIF Address L.

ior8_t FLOWSTATE¶: Register 0xE6C6: Flowstate Enable and Selector.

ior8_t FLOWLOGIC¶: Register 0xE6C7: Flowstate Logic.

ior8_t FLOWEQ0CTL¶: Register 0xE6C8: CTL-Pin States in Flowstate (when Logic = 0)

ior8_t FLOWEQ1CTL¶: Register 0xE6C9: CTL-Pin States in Flowstate (when Logic = 1)

ior8_t FLOWHOLDOFF¶: Register 0xE6CA: Holdoff Configuration.

ior8_t FLOWSTB¶: Register 0xE6CB: Flowstate Strobe Configuration.

ior8_t FLOWSTBEDGE¶: Register 0xE6CC: Flowstate Rising/Falling Edge Configuration.

ior8_t FLOWSTBPERIOD¶: Register 0xE6CD: Master-Strobe Half-Period.

ior8_t GPIFTCB3¶: Register 0xE6CE: GPIF Transaction Count Byte 3.

ior8_t GPIFTCB2¶: Register 0xE6CF: GPIF Transaction Count Byte 2.

ior8_t GPIFTCB1¶: Register 0xE6D0: GPIF Transaction Count Byte 1.

ior8_t GPIFTCB0¶: Register 0xE6D1: GPIF Transaction Count Byte 0.

ior8_t EP2GPIFFLGSEL¶: Register 0xE6D2: Endpoint 2 GPIF Flag Select.

ior8_t EP2GPIFPFSTOP¶: Register 0xE6D3: Endpoint 2 GPIF Stop Transaction on Programmable flag.

ior8_t EP2GPIFTRIG¶: Register 0xE6D4: Endpoint 2 GPIF Trigger.

ior8_t EP4GPIFFLGSEL¶: Register 0xE6DA: Endpoint 4 GPIF Flag Select.

ior8_t EP4GPIFPFSTOP¶: Register 0xE6DB: Endpoint 4 GPIF Stop Transaction on Programmable Flag.

ior8_t EP4GPIFTRIG¶: Register 0xE6DC: Endpoint 4 GPIF Trigger.

ior8_t EP6GPIFFLGSEL¶: Register 0xE6E2: Endpoint 6 GPIF Flag Select.

ior8_t EP6GPIFPFSTOP¶: Register 0xE6E3: Endpoint 6 GPIF Stop Transaction on Programmable flag.

ior8_t EP6GPIFTRIG¶: Register 0xE6E4: Endpoint 6 GPIF Trigger.

ior8_t EP8GPIFFLGSEL¶: Register 0xE6EA: Endpoint 8 GPIF Flag Select.

ior8_t EP8GPIFPFSTOP¶: Register 0xE6EB: Endpoint 8 GPIF Stop Transaction on Programmable flag.

ior8_t EP8GPIFTRIG¶: Register 0xE6EC: Endpoint 8 GPIF Trigger.

ior8_t XGPIFSGLDATH¶: Register 0xE6F0: GPIF Data H (16-bit mode only)

ior8_t XGPIFSGLDATLX¶: Register 0xE6F1: Read/Write GPIF Data L & trigger transaction.

ior8_t XGPIFSGLDATLNOX¶: Register 0xE6F2: Read GPIF Data L, no transaction trigger.

ior8_t GPIFREADYCFG¶: Register 0xE6F3: Internal RDY, Sync/Async, RDY pin states.

ior8_t GPIFREADYSTAT¶: Register 0xE6F4: GPIF Ready Status.

ior8_t GPIFABORT¶: Register 0xE6F5: Abort GPIF Waveforms.

ior8_t EP0BUF[64]¶: Register 0xE740: EP0-IN/-OUT buffer.

ior8_t EP1OUTBUF[64]¶: Register 0xE780: EP1-OUT buffer.

ior8_t EP1INBUF[64]¶: Register 0xE7C0: EP1-IN buffer.

ior8_t EP2FIFOBUF[1024]¶: Register 0xF000: 512/1024 byte EP 2 / slave FIFO buffer (IN or OUT)

ior8_t EP4FIFOBUF[512]¶: Register 0xF400: 512 byte EP 4 / slave FIFO buffer (IN or OUT)

ior8_t EP6FIFOBUF[1024]¶: Register 0xF800: 512/1024 byte EP 6 / slave FIFO buffer (IN or OUT)

ior8_t EP8FIFOBUF[512]¶: Register 0xFC00: 512 byte EP 8 / slave FIFO buffer (IN or OUT)